Such semiconductor circuits are frequently used as memory circuits, particularly for DRAMs (Dynamic Random Access Memories). Semiconductor memories contain a multiplicity of memory cells which can be driven electrically using word lines and bit lines. Frequently, some of the memory cells are inoperable, in which case additional memory cells, provided on the semiconductor chip as a replacement for faulty memory cells, are switched in before the semiconductor memory is put into operation. To this end, by way of example, additional word lines are activated and word lines leading to faulty memory cells are deactivated. Activation or deactivation is effected using electrically programmable fuses which can be switched once from a conductive state into an insulating state (in the case of a fuse) of from an electrically insulating state into an electrically conductive state (in the case of an “antifuse”) using an increased programming voltage.
Such redundant circuits are employed to make it possible to use a number of intact memory cells which is sufficient overall. In this case, a word line or bit line which is normally driven is permanently deactivated and a redundant word line or bit line is permanently activated, respectively. In addition, logic circuits may also contain electrically programmable switching elements, e.g. fuses, particularly “antifuses”.
Electrical fuses (antifuses and fuses) require higher voltages than the operating voltages of between 1.5 and 4 V, for example 3.3 V, which are usual in semiconductor circuits. In the case of antifuses, for example, an insulating layer needs to be blown, which is why it is necessary for a sufficiently high programming voltage for blowing the insulating layer and hence for switching the antifuse to be applied to two electrodes arranged on either side of this insulating layer.
Electrically switchable fuses are frequently produced using transistor designs, in which case the two source/drain implantations are shorted to form a single electrode at the substrate. For this purpose, they are put into a well which has been doped using dopant of the same doping type (n-doping or p-doping) as the source/drain regions themselves. Also, such a switching element is designed like a transistor; above the gate oxide layer there is the gate electrode, which in this case serves as second electrode of the switching element.
The source/drain implantations are highly doped substrate regions of the substrate electrode; in addition, there may optionally be another channel doping, likewise of the same doping type, in order to enrich charge carriers centrally beneath the gate layer more easily, said charge carriers traversing the insulating layer and destroying it locally when the programming voltage is applied, which makes the switching element permanently conductive.
In the case of a p-doped semiconductor substrate, for example, an electrically switchable switching element such as an nFET (n-field effect transistor) is produced, whose source/drain implantations are negatively doped. This transistor structure is produced in an n-well made in the p-substrate, so that the two heavily n-doped source/drain implantations are shorted by the likewise n-doped well. This means that the use of a well of the same doping type as the doping type of the two source/drain implantations conventionally permits these implantations to be shorted to form a single substrate electrode on the switching element.
In the case of a p-substrate, the gate electrode is connected to an external positive potential (i.e. one which is provided outside of the semiconductor substrate) when the switching element is to be blown. The substrate electrode formed using the shorted source/drain implantations is connected to a second potential, which is provided by the semiconductor circuit itself; if it is large enough, the potential difference between the two potentials results in the gate oxide layer melting through. In the case of the p-substrate which contains the n-doped well for the switching element in an nFET design, the second potential chosen in order to bias the substrate electrode is one which is higher than the substrate potential, i.e. higher than 0 V, in order to maintain a reverse biased pn-junction between the well and the surrounding substrate when the switching element is blown. Otherwise, the charges intended for blowing the switching element would drain via the substrate.
The potential connected to the substrate electrode is thus (in the case of a p-substrate) always positive. Since electrons need to be accumulated in the channel region of the switching element, the gate potential for blowing the switching element is higher by the programming voltage than the potential on the substrate electrode.
When the potential on the substrate electrode is already positive anyway, the condition of high programming voltages results in a very large value for the potential on the gate electrode; if such a high potential is applied to the gate electrode from an external connection via the semiconductor circuit, other regions of the semiconductor circuit which cannot withstand such high voltages are destroyed. Hence, limits are set for the level of programming voltages which can be applied in the conventional design of electrical fuses or antifuses.